A Novel System Simulation Framework for HBM2 FPGA Platforms

Every year, the disparity between processing power and memory bandwidth continues to expand. This well-established trend has been recognized for several years. Recently, innovative concepts have emerged to address and narrow this growing gap. One notable example of such technology is High Bandwidth Memory (HBM), which is specifically designed to tackle this challenge. HBM has a much higher throughput thanks to their wider data buses, making it an innovative solution for this problem. Due to its configurability and timing requirements, HBM and Field-Programmable Gate Arrays (FPGAs) offer a great combination for prototyping, and the hardware that includes both is slowly gaining popularity and accessibility. In this work, we introduce an open-source simulator capable of accurately predicting and modeling HBM based FPGA systems in a fast-prototyping manner. This design not only simulates an HBM but also a memory controller and a memory interconnect, like the one used by AMD/Xilinx. To prove accuracy, this work shows side-by-side comparison between the real hardware and simulated benchmarks of different specific types of memory access patterns, where we measure an overall error of 9.91%. Finally, we compare the performance of some real-life applications where we report an average error of 2.72%.