Flexible design and dynamic utilization of adaptive scalable multi-core systems

Multiprocessor Systems-on-Chip (MPSoCs) are a promising solution to fulfill the performance requirements of embedded high performance computing applications, because of their parallel execution model. However, MPSoCs have a fixed hardware architecture where only the software can be adapted to a specific request. On the contrary, Field Programmable Gate Arrays (FPGAs) provide a very flexible and reprogrammable hardware architecture. This means, the hardware topology, the memory and the processor's microarchitecture of an FPGA system can be adapted at design- and at runtime to the application requirements. This dissertation introduces the holistic RAMPSoC (Runtime Adaptive MPSoC) approach, which combines the multiprocessor system performance, the reconfigurable system flexibility and the parallelism of FPGAs. RAMPSoC consists of three main components: the heterogeneous runtime adaptive MPSoC architecture, a user-guided design methodology and a runtime operating system. RAMPSoC supports the runtime adaptation of the processors, the communication infrastructure and the accelerators resulting in a high energy efficiency. To support the runtime adaptation of the communication infrastructure and to analyze the communication patterns of the applications at runtime, the novel hybrid Star-Wheels Network-on-Chip was developed. To hide the complexity of this novel hardware architecture, a user-guided design methodology was developed. This design methodology analyzes and partitions MATLAB code or C/C++ code, and it generates the appropriate hardware architecture including the configuration files for the FPGA. To manage the runtime adaptation of the software and the hardware and to virtualize the RAMPSoC architecture, a special abstraction layer called RAMPSoC Virtual Machine (RAMPSoCVM) has been developed, which uses a special purpose operating system called CAP-OS (Configuration Access Port - Operating System) to schedule and map the applications onto the RAMPSoC architecture. The benefits of the RAMPSoC approach have been demonstrated using various real-world applications from different domains, such as signal processing, image processing and bioinformatics.