Trimless high precision ratioed resistors in D/A and A/D converters

Investigations into realization of high precision ratioed resistors in standard CMOS and BiCMOS processes have been carried out. The results indicate that the layout of the resistors can be optimized with respect to area and matching requirements to yield relative accuracy better than 0.25%. Using an intermeshed ladder architecture, fast converters with resolution up to 10 b are realizable without trimming.