Fan-out wafer-level packaging as packaging technology for MEMS

Fan-out wafer-level packaging (FOWLP) became widely known after the introduction of technology that was called embedded wafer-level ball-grid array by the company Infineon. The original aim was to provide at low cost an increased surface area compared to wafer-level (chip-scale) packaging in order to accommodate a greater number of IO bumps than the area of the die was allowing. Later the application scope was extended to system-in-package devices with more than one die per package and to millimeter-wave devices. After 2015 it has been the fastest growing packaging technology with CAGR close to 30%. In 2018 2.3 million reconstituted wafers were produced and for 2022 the predicted number is 3.7 million. Depending on the device size, each wafer may contain from hundreds to thousands of devices. It can be safely assumed that in 2018 more than 2 billion devices were packaged in FOWLP. Mobile market is by far the main application area, but others are emerging with high growth (computing, medical) or steady growth (automotive). The boost that started in 2015 was due to a major mobile device supplier adopting FOWLP for circuits in their phones. Market analysis estimates that FOWLP will also be used for packaging of MEMS in both mobile and automotive markets.