• English
  • Deutsch
  • Log In
    Password Login
    Research Outputs
    Fundings & Projects
    Researchers
    Institutes
    Statistics
Repository logo
Fraunhofer-Gesellschaft
  1. Home
  2. Fraunhofer-Gesellschaft
  3. Konferenzschrift
  4. High voltage 3D-capacitor
 
  • Details
  • Full
Options
2007
Conference Paper
Title

High voltage 3D-capacitor

Abstract
In this work, we introduce a high voltage 3D-capacitor as a novel passive power device for a 400 V application. This device is realized in silicon technology which allows process reproducibility, high accuracy in capacitance values, and high quality of the dielectric layers (i.e., endurance at high electric field strengths). It can be manufactured discrete or as part of a monolithic integrated circuit. The outstanding properties of the device are a high ratio of capacitance value to consumed silicon area (capacitance enlargement of more than a factor of 16 in comparison to plane capacitors) and very stable capacitance values over a broad temperature range (i.e., average of 24 ppm/°C from 20-175°C).
Author(s)
Berberich, S.E.
Bauer, A.J.
Ryssel, H.
Mainwork
European Conference on Power Electronics and Applications, EPE 2007  
Conference
European Conference on Power Electronics and Applications (EPE) 2007  
DOI
10.1109/EPE.2007.4417708
Language
English
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Keyword(s)
  • capacitor

  • elemental semiconductor

  • passive network

  • power semiconductor device

  • silicon

  • Cookie settings
  • Imprint
  • Privacy policy
  • Api
  • Contact
© 2024