1986
Conference Paper
Title

CORDIC realization of a DFT processor

Abstract
This contribution describes a proposed implementation of a DFT processor based on a modified Bluestein algorithm. It uses CORDIC elements to execute complex multiplications. The processor has been simulated using the digital circuit simulator HILO-2. (IMS)
Author(s)
Schmidt, G.
Zimmermann, D.
Böhme, J.F.
Hosticka, B.J.
Lerch, R.
Zimmer, G.
Mainwork
Conference
Language
English