An approach for the predictin of sensitive I/O ports using noise distribution on PCB-level

In this contribution a methodology for the prediction of critical device pins at PCB level with respect to induced transient impulses is presented. The method proposed is based on the identification of the most dominant signal propagation paths using single shortest path algorithms. Thus, the noise distributed from a source to many device pins is determined simultaneously considering all coupling effects. The critical pins can be predicted depending on the amount of noise transmitted through the dominant paths. For a complete analysis, the connection matrix method is used to reduce the size of the circuit The methodology is illustrated by a transmission tine circuit.