• English
  • Deutsch
  • Log In
    Password Login
    Research Outputs
    Fundings & Projects
    Researchers
    Institutes
    Statistics
Repository logo
Fraunhofer-Gesellschaft
  1. Home
  2. Fraunhofer-Gesellschaft
  3. Konferenzschrift
  4. Vertical Design of InN Field Effect Transistors
 
  • Details
  • Full
Options
2010
Conference Paper
Title

Vertical Design of InN Field Effect Transistors

Abstract
The vertical design of indium nitride field effect transistors is investigated by numerical simulation. To this end, the Schrödinger equations for electrons and holes and Poisson's equation are solved self-consistently. It is shown that in several layer sequences simultaneously two-dimensional electron and hole gases are formed in the InN channel. It is demonstrated that because of the high unintentional n-type doping only thin InN layers are useful for proper transistor operation. Strain in the InN layer leads to the formation of parasitic hole channels which can dramatically deteriorate transistor characteristics. Finally it is shown that thin relaxed InN channels on GaN or AlInN buffers are a viable option for InN transistors.
Author(s)
Granzner, R.
Kittler, M.
Schwierz, F.
Polyakov, V.M.
Fraunhofer-Institut für Angewandte Festkörperphysik IAF  
Mainwork
European Solid-State Device Research Conference, ESSDERC 2010. Proceedings  
Conference
European Solid-State Device Research Conference (ESSDERC) 2010  
European Solid-State Circuits Conference (ESSCIRC) 2010  
DOI
10.1109/ESSDERC.2010.5618189
Language
English
Fraunhofer-Institut für Angewandte Festkörperphysik IAF  
  • Cookie settings
  • Imprint
  • Privacy policy
  • Api
  • Contact
© 2024