• English
  • Deutsch
  • Log In
    Password Login
    Research Outputs
    Fundings & Projects
    Researchers
    Institutes
    Statistics
Repository logo
Fraunhofer-Gesellschaft
  1. Home
  2. Fraunhofer-Gesellschaft
  3. Konferenzschrift
  4. Monte Carlo simulation using VHDL-AMS
 
  • Details
  • Full
Options
2004
Conference Paper
Title

Monte Carlo simulation using VHDL-AMS

Abstract
Monte Carlo simulation is widely used in Spice like circuit simulators. It allows to obtain statistical information derived from estimates of the random variability of circuit parameters. Multiple simulation runs are carried out with different sets of parameters. VHDL-AMS provides flexible possibilities to specify nominal and tolerance values and their distributions. Correlation between parameters can easily be taken into account. This is especially important if behavioral models are considered. The paper describes requirements and implementation aspects of the Monte Carlo simulation using VHDL-AMS.
Author(s)
Wagner, Ekkehart-Peter
Siemens VDO Automotive AG Regensburg
Haase, Joachim
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Mainwork
FDL 2004, Forum on Specification & Design Languages. Proceedings. Vol.1  
Conference
Forum on Specification & Design Languages (FDL) 2004  
File(s)
Download (253.02 KB)
Rights
Use according to copyright law
DOI
10.24406/publica-fhg-347444
Language
English
Fraunhofer-Institut für Integrierte Schaltungen IIS  
  • Cookie settings
  • Imprint
  • Privacy policy
  • Api
  • Contact
© 2024