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  4. Open Source Hardware Design and Hardware Reverse Engineering: A Security Analysis
 
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2022
Conference Paper
Title

Open Source Hardware Design and Hardware Reverse Engineering: A Security Analysis

Abstract
Major industry-led initiatives such as RISC-V and OpenTitan strive for verified, customizable and standardized products, based on a combination of Open Source Hardware (OSHW) and custom intellectual property (IP), to be used in safety and security-critical systems. The protection of these products against reverse-engineering-based threats such as IP Theft and IP Piracy, Hardware Trojan (HT) insertion, and physical attacks is of equal importance as for closed source designs. OSHW generates novel threats to the security of a design and the protection of IP. This paper discusses to what extent OSHW reduces the difficulty of attacking a product. An analysis of the reverse engineering process shows that OSHW lowers the effort to retrieve broad knowledge about a product and decreases the success of related countermeasures. In a case study on a RISC-V core and an AES design, the red team uses knowledge about OSHW to circumvent logic locking protection and successfully identify the functionality and the used locking key. The paper concludes with an outlook on the secure protection of OSHW.
Author(s)
Baehr, Johanna
Hepp, Alexander
Brunner, Michaela
Malenko, Maja
Sigl, Georg  
Fraunhofer-Institut für Angewandte und Integrierte Sicherheit AISEC  
Mainwork
25th Euromicro Conference on Digital System Design, DSD 2022. Proceedings  
Project(s)
Systeme und Methoden für die Analyse und Rekonstruktion höchstintegrierter Sicherheitsschaltungen  
Funder
Bundesministerium für Bildung und Forschung  
Conference
Conference on Digital System Design 2022  
DOI
10.1109/DSD57027.2022.00073
Language
English
Fraunhofer-Institut für Angewandte und Integrierte Sicherheit AISEC  
Keyword(s)
  • hardware security

  • IC trust

  • IP obfuscation

  • IP protection

  • open source hardware

  • reverse engineering

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