Development of a P1-filling process to increase the cell performance in the copper indium gallium Selenide photovoltaics by implementation of the inkjet technology

In this paper, the suitability of integrating a digital manufacturing tool i.e. inkjet technology is exemplified to increase the electrical performance of thin-film based Copper Indium Gallium Selenide (CIGS) photovoltaic (PV) modules. Typically, the series connection within the PV module is established conventionally by three adjacent scribing lines at different deposition stages (patterning P1, P2 and P3). The total width of these three scribes is typically in the order of several 100's of microns and is electrically inactive, so these regions are lost areas for current generation (up to 5% “dead area”). To reduce the line width of the first scribe (P1) without compromising on the electrical parameters, we have concentrated on accurately filling of the interconnect P1-trenches with insulating material using inkjet technology, as initial step to realize the concept for dead area reduction by developing a P1-filling process (< 80 μm printed filling width) for laser structured/patterned trenches of ~50 μm width. With the right combination of carefully selected material interface, inkjet printhead, deposition settings, pattern digitalization & other parameters, we are able to develop an industry relevant micro-filling process. And, show an increase in the performance of PV cells, as compared to the reference modules. The results lay the foundation for direct up-scaling to industrial-size substrate areas and open up the possibility to realize all kinds of advanced interconnect schemes for the next generation thin-film CIGS PV modules.