Select device disturb phenomenon in TANOS NAND flash memories

This letter investigates a new select device disturb phenomenon in TANOS NAND flash memories. Since NAND string select devices contain the same charge trap (CT) stack as the memory cells, they are, in principle, programmable. We observe a select threshold voltage increase during cycling of the cell array. This disturb is caused by electron injection from the outermost wordline into the CT layer of the select devices under the erase condition. The increasing select threshold voltage leads to a reduced string current and, finally, to read fails of the NAND string. The mechanism is evaluated by means of electrical measurements and field simulations. Several options to overcome this issue are proposed.