Interfacial strength of silicon-to-molding compound changes with thermal residual stress

As we face higher numbers of material layers in the increasingly complex Microsystems, the rating of layers reliability has to keep pace. Fracture mechanical descriptions are a big qualitative improvement when using simulation for design and reliability support, especially when looking at layer delamination. In order to simulate the interfacial fracture we urgently need to find empirical parameters, because the fracture parameters have to be verified as critical. Such experiments are difficult to carry out at the Silicon-to-Epoxy Molding Compound (EMC) interface. We are now able to do such investigations using the Mixed Mode Chisel (MMC) setup. In this paper we compare results of the Silicon-EMC interface for the in- and exclusion of thermal residual stresses in the simulations. The interface specimens are of package scale and are derived from the embedded wafer level molding process. We find the impact of thermal residual stresses crucial for the validity of fracture toughness values, and show relations to consider when using the MMC setup. We do not find any EMC residuals on the delaminated Silicon surface.