On-chip monitoring for adaptive heterogeneous multicore systems. Invited paper

Ad-hoc and dynamic adaptation to the requirements of an application enables to increase the energy efficiency of a processor. This method is especially for novel heterogeneous multicore systems of high interest since the various cores can be adapted individually. For this purpose, the current status of the system has to be monitored on the chip. Parameters of interest are the number of communications between cores as well as the current program sequence which is currently processed on an individual processor core. A program sequence is e.g. a loop, control flow or even the termination of the program. All this information has to be extracted from the standard processor cores through a set of on-chip monitors. The concept, as well as the physical realization of two different on-chip monitors for extracting information about the communication effort and for detecting program sequences, is presented in this paper.