Efficiency Enhanced Zero CM Voltage Space Vector Modulation for Parallel Three-Level Converters

Zero common-mode voltage (CMV) modulation has the advantage of reducing electromagnetic interference (EMI) and exhibits the feature of generating hardly any zero-sequence circulating current in parallel-connected converters. However, this modulation can increase phase current harmonics using only a few voltage vectors that do not induce CMV. Although several space vector modulations (SVMs) have been proposed to overcome this drawback, they suffer from issues such as high losses or internal current distortion. To overcome these drawbacks, this letter proposes a new modulation that not only outperforms the efficiency of existing methods, but also preserves harmonic reduction. Semiconductor losses are minimized by optimizing the switching sequences (SWS) for new regions created using composite voltage vectors, and renewing the SWS in the region where the internal current distortion occurred. The comparison between the proposed SVM and existing methods is presented to prove its performance through simulation and experimental results.