A basic design guide for CMOS folding and interpolating A/D converters - overview and case study
Abstract
The design techniques for analog-to-digital converters (ADCs) require careful optimization in order to minimize the amount of hardware required and enable economical monolithic integration. A basic architectural design guide dedicated to folding and interpolating ADCs is outlined and described. A case study for a 10bit ADC is treated under consideration of different folding and interpolating factors. The trade-off between chip area, power dissipation, and ADC performance is characterized according to the diverse design variables.
