Noise-power trade-off in CMOS-GM-C channel select filters

The channel selection in direct-downconversion receivers can be performed using analog or digital filters or a combination of both. For an appropriate partitioning in an early design phase knowledge about the power-performance tradeoffs of the building blocks is necessary without knowledge about too many implementation details. This paper proposes a method to carry out the noise-power trade-off of analog Gm-C-Filters. For a particular example where the demand on adjacent channel rejection is very high it will be shown that the analog solution is very promising when compared to the digital channel selection.