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  4. Body biasing for analog design: Practical experiences in 22 nm FD-SOI
 
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2017
Conference Paper
Titel

Body biasing for analog design: Practical experiences in 22 nm FD-SOI

Abstract
This paper presents the practical application of body biasing control of ultra-deep submicron FD-SOI technologies for analog and mixed-signal designs. The body biasing control is dedicated for dynamic control of the tradeoff between speed vs. power consumption for advanced digital circuits. However, in this work we focus on trading-off and improvement of analog circuit performances. Three different circuits were explored and designed: an all CMOS bandgap reference, a 500 MSps current-steering DAC, and a 12-bit sigma-delta modulator. All designs were verified and realized in Globalfoundries 22 nm FD-SOI technology.
Author(s)
Rao, Sunil Satish
Fraunhofer-Institut für Integrierte Schaltungen IIS
Prautsch, Benjamin orcid-logo
Fraunhofer-Institut für Integrierte Schaltungen IIS
Shrivastava, Asish
Fraunhofer-Institut für Integrierte Schaltungen IIS
Reich, Torsten
Fraunhofer-Institut für Integrierte Schaltungen IIS
Hauptwerk
20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2017. Proceedings
Project(s)
PRIME
Things2Do
Funder
Bundesministerium für Bildung und Forschung BMBF (Deutschland)
Bundesministerium für Bildung und Forschung BMBF (Deutschland)
Konferenz
International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) 2017
DOI
10.1109/DDECS.2017.7934580
File(s)
N-444779.pdf (6.57 MB)
Language
English
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