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  4. A low power, offset compensated, CMOS only bandgap reference in 22 nm FD-SOI technology
 
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2018
Conference Paper
Title

A low power, offset compensated, CMOS only bandgap reference in 22 nm FD-SOI technology

Abstract
In this paper a very low supply voltage Bandgap Voltage Reference Circuit (BGR) has been presented. A temperature coefficient of 35 ppm/°C is achieved with the all-MOSFET based circuit that operates at a minimum supply voltage of 600 mV and consumes a total power of 9.5 mW. Chopping technique has been employed to eliminate the error at the output caused by the DC offset of the amplifier. The presented circuit has been designed in a 22 nm Fully Depleted Silicon on Insulator (FD-SOI) CMOS process.
Author(s)
Poongodan, Prajith Kumar  
Fraunhofer-Einrichtung für Mikrosysteme und Festkörper-Technologien EMFT  
Bora, Pragoti Pran
Fraunhofer-Einrichtung für Mikrosysteme und Festkörper-Technologien EMFT  
Borggreve, David  
Fraunhofer-Einrichtung für Mikrosysteme und Festkörper-Technologien EMFT  
Vanselow, Frank  
Fraunhofer-Einrichtung für Mikrosysteme und Festkörper-Technologien EMFT  
Maurer, Linus
Universität der Bundeswehr
Mainwork
7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018  
Project(s)
Things2Do
REFERENCE  
Funder
European Commission EC  
Bundesministerium für Bildung und Forschung BMBF (Deutschland)  
Conference
International Conference on Modern Circuits and Systems Technologies (MOCAST) 2018  
DOI
10.1109/MOCAST.2018.8376639
Language
English
Fraunhofer-Einrichtung für Mikrosysteme und Festkörper-Technologien EMFT  
Keyword(s)
  • bandgap voltage reference

  • FD-SOI CMOS

  • ultra low voltage bandgap reference

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