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  4. Design of trustable eFuses for automotive E/E architectures
 
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April 10, 2024
Presentation
Title

Design of trustable eFuses for automotive E/E architectures

Title Supplement
Presentation held at European Nanoelectronics Applications, Design & Technology Conference / eda-Workshop 2024, April 06-10, 2024, Dresden, Germany
Abstract
Electric vehicles are equipped with a complex network of electronics that operate at high currents and voltages. Protecting the vehicle's electrical system from damage caused by overcurrent and overtemperature is a crucial design requirement. Short circuits can have serious consequences, including potential fatalities. Therefore, all components within the E/E architecture must be safeguarded against hazardous conditions such as overvoltage, undervoltage, overcurrent, and overtemperature. At the same time, reducing the vehicle's weight and cost while increasing the battery range requires to minimize cable harness cross-sections. To achieve both goals, new devices like smart fuses are utilized, enabling more flexible and intelligent protection schemes. However, the increased functionality of smart fuses also brings about challenges in designing and verifying their performance, particularly under dynamically-changing load conditions. In this study, we propose a simulation-based verification methodology for overtemperature protection algorithms in automotive smart fuses. Our approach involves a co-simulation between the mixed-signal fuse and a thermal reduced-order model of the relevant part of the E/E architecture, using SystemC AMS. While the virtual Electronic Control Unit executes the target executable, the analog and thermal domains are simulated concurrently. The electrothermal model can be integrated into a Virtual Platform, facilitating a Software-on-Top workflow and the analysis of algorithms under complex, dynamically-changing currents.
Author(s)
Markwirth, Thomas  orcid-logo
Fraunhofer-Institut für Integrierte Schaltungen IIS  
Meddeb, Mehdi
CARIAD SE
Velle, Koen
Synopsys
Project(s)
Designmethoden und HW/SW-Co-Verifikation für die eindeutige Identifizierbarkeit von Elektronikkomponenten  
Funder
Bundesministerium für Bildung und Forschung -BMBF-  
Conference
European Nanoelectronics Applications, Design & Technology Conference 2024  
edaWorkshop 2024  
File(s)
Download (4.1 MB)
Rights
Use according to copyright law
DOI
10.24406/publica-3026
Language
English
Fraunhofer-Institut für Integrierte Schaltungen IIS  
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