IPG-Transistor mit vertikalem Gate-Komplex

A process for producing an in-plane-gate (IPG) transistor (10) involves: (a) producing a semiconductor substrate (12) having a semiconductor layer (16) insulated from the substrate by an insulation layer (14); (b) photolithographically structuring the semiconductor layer (16) to separate the transistor gate, source and drain electrodes by a trench (18) which extends down to the insulation layer (14); (c) filling the trench (18) and covering the electrodes and the trench (18) with a field oxide; and (d) producing contact structures (28, 30) for the electrodes. Also claimed is a similar process in which steps (b) and (c) are replaced by photolithographically structuring the semiconductor layer to define source and drain electrodes, photolithographically defining and etching away a subsequent gate region, depositing a gate insulation layer in the etched gate region and depositing the gate electrode on the gate insulation layer. Further claimed are IPG transistors produced as described abo ve. ADVANTAGE - The processes allow IPG transistor production by a simple CMOS compatible method and the transistor is inexpensive, reliable and temperature resistant.