Photoempfaengeranordnung und Verfahren zum Betreiben eines Photoempfaengers

(A1) Es wird eine Photodetektoranordnung mit einem Photoempfaenger, der eine Photodiode, einen Abblockkondensator fuer Hochfrequenz und einen am Signalausgang der Photodiode liegenden Abschlusswiderstand aufweist, vorgeschlagen. Die Photodiode ist mit einem ersten Bias-Anschluss zur Versorgung mit einer Sperrspannung verbunden und ein zweiter Bias-Anschluss ist mit dem Abschlusswiderstand zur Steuerung des Potentials am Signalausgang verbunden. Ein weiterer Abblockkondensator ist zur hochfrequenztechnischen Erdung des Abschlusswiderstandes vorgesehen.

US 20110062315 A1 UPAB: 20110413 NOVELTY - The arrangement has a blocking capacitor (Cmim) and a terminal resistor (Zterm) lying at a signal output (S) of a photodiode (PD) e.g. pin-photodiode. The photodiode is connected to a part bias connection (9) for the supply with a blocking voltage. A bias connection (11) is connected to the resistor for controlling the potential at the signal output. The capacitor is provided for the high-frequency-technological earthing of the resistor. The capacitor lies between the bias connection and an earth line. The resistor is connected between the bias connection and the signal output. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for a method for operating a photoreceiver. USE - Photoreceiver arrangement. ADVANTAGE - The bias connection is divided into two part-bias-connections, so that a variable setting of the blocking voltage for the photodiode is achieved, and the protective effect with regard to electrical overvoltages is increased. The arrangement directly connects a photoreceiver e.g. bias-feeding photodiode receiver, and an integrated circuit (IC) such as demultiplexer-IC or amplifier-IC, in a direct current-coupled manner without high-frequency damping losses, so that an exact linear control of the voltage potential of the input of the subsequent circuit is provided without measurement tappings or bias-Ts becoming necessary at the sensitive high-frequency signal line. The arrangement couples two optoelectrical ICs to avoid noticeable high-frequency damping in the separately housed case and save high costs for a highest-frequency bias-T.