Schieberegister und Mikroprozessoranordnung

EP 942434 A UPAB: 19991124 NOVELTY - Shift register (1) has data input (D) for acquisition of data bits, binary storage elements (4-6) for the acquired data bits, data output (Q) for stored data bits and a first control input for a binary control signal. Control logic (7) drives the storage elements to accept a new data bit via the data input and/or to output one of the stored data bits via the data output for a predefined value of the first control signal. Second control logic circuit (10) increases the stored level value by one for a certain value of the first control signal. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for a microprocessor arrangement. USE - For microprocessor arrangement. ADVANTAGE - Enables macro cells to be saved for intervention carry operations.