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Significant on-resistance reduction of LDMOS devices by intermitted trench gates integration

Wesentliche Verringerung des Driftwiderstands von LDMOS Bauelementen durch Einführung unterbrochener Grabenstrukturen. Wesentliche Verringerung des Ein-Widerstands in LDMOS Bauelementen durch Integration von Grabengates (lokal)
 
: Erlbacher, Tobias; Bauer, Anton J.; Frey, Lothar

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Postprint urn:nbn:de:0011-n-2201222 (393 KByte PDF)
MD5 Fingerprint: 45c7366eb8bf6d8e84bfb27d44126ae3
© 2012 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Created on: 30.11.2012


IEEE transactions on electron devices 59 (2012), No.12, pp.3470-3476
ISSN: 0018-9383
English
Journal Article, Electronic Publication
Fraunhofer IISB ()
MOS integrated circuits; ICs; Power MOSFET; power semiconductor device; semiconductor device modeling; silicon devices; capacitance; integrated circuit; logic gates; power dissipation; standards; switches; topology; analyzing power; device parameters; high frequency operation; input capacitance; integrated circuit technology; LDMOS devices; metal oxide semiconductor; on-resistance; static and dynamic; technology computer aided design; trench gates

Abstract
A concept for the integration of intermitted trench gates into silicon lateral double-diffused metal-oxide-semiconductor (LDMOS) devices is proposed to achieve a significant reduction in on-resistance. The trench structure can be feasibly integrated into smart-power integrated circuit technology. Using 2-D technology computer aided design (TCAD) simulations, the achievable reduction in $R {DS, {rm on}}$ from 145 $hbox{m}Omegacdot hbox{mm}{2}$ down to 94 $hbox{m}Omegacdothbox{mm}{2}$ for a 50 V LDMOS device and the negligible impact on the blocking characteristics were demonstrated. Additionally, the device parameters were analyzed with respect to static and dynamic power dissipation. Here, the benefits of trench gate integration became more apparent. Analyzing power losses during high-frequency operation revealed that the increased input capacitance resulting from the trench gate is acceptable for applications where high switching frequencies in the upper megahertz range are not required.

: http://publica.fraunhofer.de/documents/N-220122.html