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Evaluation of materials for high temperature IC packaging

: Klieber, R.; Lerch, R.G.

Institute of Electrical and Electronics Engineers -IEEE-; Circuits Multi-Projets -CMP-, Grenoble; IEEE Components, Packaging, and Manufacturing Technology Society:
THERMINIC 2009, 15th International Workshop on Thermal Investigations of ICs and Systems : Leuven, Belgium, 7 - 9 October 2009
New York, NY: IEEE, 2010
ISBN: 978-1-4244-5881-3
ISBN: 978-2-35500-010-2
International Workshop on Thermal Investigations of ICs and Systems (THERMINIC) <15, 2009, Leuven>
Conference Paper
Fraunhofer IMS ()
Hochtemperatur; SOI-EEPROM; packaging; AVT; high temperature

Fast decrease of device dimensions, rapid growth of the number of elements per integrated circuit device (IC) and the increasing amount of interconnections between the chip and the substrate lead to a more complex design and production of the ICs and to higher demands towards packaging technology as well. This is especially true in the field of high temperature electronics with operating temperatures of up to 250°C. We present an evaluation of materials for both the adhesive and the encapsulant for packaging of high temperature ICs for this temperature range. Among the available materials only glassbased formulations could withstand extended periods of heat and substantial numbers of temperature cycles. In addition, samples of high temperature CMOS ICs (capacitive pressure sensors and EEPROMs) have been successfully assembled using these materials.