Heyn, WielandWielandHeynMelzner, HannoHannoMelznerGoller, KlausKlausGollerAnaniev, SergeySergeyAnanievClausner, AndréAndréClausnerZechner, JohannesJohannesZechnerZschech, EhrenfriedEhrenfriedZschech2022-05-062022-05-062021https://publica.fraunhofer.de/handle/publica/41706810.1109/IPFA53173.2021.96172762-s2.0-85122920552Small-scale delamination experiments at single copper vias in on-chip interconnect stacks of microelectronic chips are performed using a novel experimental setup for testing of interface properties of single copper interconnect structures. The method is based on in-situ SEM nanoindentation experiments, utilized to test customized copper test structures manufactured in the Dual Damascene process. In this unique way, the test structures resemble product-like length-scales as well as material and interface properties. For the investigation of interface properties, the experimental load-displacement data is reviewed. FIB cross sections are performed to validate the delaminated interface. The results gain information on the critical delamination forces and show a good reproducibility for two investigated interfaces. Future work could focus on re-simulating the experimental load-displacement data and thereby gain knowledge of interfacial toughness parameters.enmicro-mechanical testinginterconnect stabilityin-situ nanoindentation620666conference paper