Brockherde, W.W.BrockherdeHess, K.G.K.G.HessKlinke, R.R.KlinkeMeyer zu Bexten, V.V.Meyer zu BextenMoraga, C.C.Moraga2022-03-032022-03-031992https://publica.fraunhofer.de/handle/publica/180982In this paper ALSYN (Analog Layout SYNthesis), a new tool that synthesizes layout from netlist-level descriptions for a broad range of analog integrated circuits, is presented. User-defined rules derive partitioning and other control information, based on parameters and topology of the circuit. Equivalent control information can also be set individually, e.g., supplied in the input netlist by preceding circuit synthesis or during interactive usage of the synthesis system. This flexible concept enables designers to incorporate their own reusable knowledge into the synthesis process and to explore design space with the assistance of ALSYN.enALSYNanaloge integrierte SchaltungAnalogschaltunganalogue circuitbipolar integrated circuitBipolarschaltunglayoutlayout synthesislinear integrated circuitsMOS integrated circuitMOS-SchaltungplacementPlazierungRegelungssystemregulation system621journal article