Kumar, P.P.KumarStajic, D.D.StajicBöhme, E.E.BöhmeIsa, E.N.E.N.IsaMaurer, L.L.Maurer2022-03-152022-03-152020https://publica.fraunhofer.de/handle/publica/41197010.1109/NorCAS51424.2020.9265006In this paper, we present the design methodology and measurement results of a low-power, ultra-wide range Voltage Controlled Oscillator (VCO), with frequency range varying from 13.1-18.4 GHz. The design is fabricated in the 22-nm fully depleted Silicon-on-Insulator (FDSOI) CMOS technology from Globalfoundaries. The VCO is interfaced with a cascode buffer. The physical insights of the super-low-threshold-voltage transistors with adaptive back-gate-biasing is used in the design implementation. The fabricated chip is characterized on the wafer-probe station using manual and automated measurements. The VCO exhibits a frequency-tuning ratio (FTR) of 33.3 % and a power consumption of ≈ 4.5 mW with a supply voltage of 500 mV and back gate bias voltage of 500 mV.en621A 500 mV, 4.5 mW, 16 GHz VCO with 33.3% FTR, designed for 5G applicationsconference paper