Oehler, F.F.OehlerSauerer, J.J.SauererHagelauer, R.R.HagelauerSeitzer, D.D.SeitzerNowotny, U.U.NowotnyRaynor, B.B.RaynorSchneider, J.J.Schneider2022-03-082022-03-081993https://publica.fraunhofer.de/handle/publica/32052910.1109/GAAS.1993.394478A 0.3 mu m AlGaAs-HEMT technology was used to develop a high speed Analog to Digital Converter (ADC). The 5 bit converter based on a parallel architecture, operates up to a 3.6 GHz sampling rate. Excellent dynamic performance was achieved by an optimized comparator design and careful layout of the signal and clock lines. Each comparator is preceeded by a preamplifier to enhance its sensitivity and to minimize clock kickback. Using source follower buffers at the input, a very linear input capacitance was achieved. Thus the ADC's overall input capacitance is voltage independant.encomparatorflash ADCGallium Arsenidgallium arsenideHEMTKomparatorParallelumsetzer006621A 3.6 Gigasample/s 5 bit analog to digital converter using 0.3 mu m AlGaAs-HEMT technologyconference paper