Rausch, MarkoMarkoRauschFlisgen, ThomasThomasFlisgenStölmacker, ChristophChristophStölmackerStranz, AndrejAndrejStranzThies, AndreasAndreasThiesDoerner, RalfRalfDoernerYacoub, HadyHadyYacoubHeinrich, WolfgangWolfgangHeinrich2023-07-262023-07-262022https://publica.fraunhofer.de/handle/publica/44609210.23919/EuMC54642.2022.99244512-s2.0-85142242224We present a low-temperature flip-chip-based mounting technology, enabling integration of indium phosphide (InP)-based chiplets on BiCMOS. The process temperatures of well below 200°C allow to mount chips with limited temperature budget without degrading the device performance. To ensure good scalability, repeatability and flexibility in terms of complex transitions we use a pillar-based approach instead of the popular bump array technique. Thermal simulations prove that the increase in thermal resistances due to integration is not critical. The RF performance was evaluated using simple coplanar waveguide (CPW) test chips and carriers without any special transition optimization. The results indicate good broadband characteristics up to frequencies beyond 100 GHz.enFlip-chip devicesheterobipolar transistorindium phosphide (InP)millimeter-wave (mm-wave) integrated circuitssemiconductor device packagingconference paper