Braun, T.T.BraunBecker, K.-F.K.-F.BeckerWöhrmann, M.M.WöhrmannTöpper, M.M.TöpperBöttcher, L.L.BöttcherAschenbrenner, R.R.AschenbrennerLang, K.-D.K.-D.Lang2022-03-132022-03-132017https://publica.fraunhofer.de/handle/publica/39772910.23919/ICEP.2017.79393872-s2.0-85021452180The constant drive to further miniaturization and heterogeneous system integration leads to a need for new packaging technologies that also allow large area processing and 3D integration with strong potential for low cost applications. Here, Fan-Out Wafer Level Packaging [FOWLP] is one of the latest packaging trends in microelectronics. Besides developments to higher and heterogeneous integration the movement to larger formats and panel level packaging to lower cost is noticeable.enconference paper