Liszewski, J.J.LiszewskiSchubert, B.B.SchubertKeusgen, W.W.KeusgenKortke, A.A.Kortke2022-03-112022-03-112011https://publica.fraunhofer.de/handle/publica/37165210.1109/PAWR.2011.57253822-s2.0-79953064124In this paper we present a FPGA design of a digital predistorter (DP) for power amplifiers (PAs) regarding memory effects. As model description the baseband Volterra series are utilized. A reduction of Volterra coefficients can be achieved using their symmetry properties. An advantage of our DP approach is a direct offline model identification, without need to analytically or iteratively calculate a PA model inverse. The DP implementation is very flexible and saves FPGA ressources. Our simulation and measurement results show a good linearization performance applying simple Volterra model structures. DP with and without memory are compared.en621conference paper