Numerical simulation of time delay and cross-talk noise for the interconnect in VLSI circuits

Ruan, G.G.RuanXiao, X.X.XiaoSong, R.R.R.R.SongStreiter, R.R.StreiterOtto, T.T.OttoGessner, T.T.Gessner2022-03-032022-03-032000https://publica.fraunhofer.de/handle/publica/198370en621Numerical simulation of time delay and cross-talk noise for the interconnect in VLSI circuitsjournal article