Lim, MinwhoMinwhoLimSledziewski, TomaszTomaszSledziewskiRommel, MathiasMathiasRommelErlbacher, TobiasTobiasErlbacherKim, Hong-KiHong-KiKimKim, SeongjunSeongjunKimShin, Hoon-KyuHoon-KyuShinBauer, A.J.A.J.Bauer2022-03-142022-03-142020https://publica.fraunhofer.de/handle/publica/40852310.4028/www.scientific.net/MSF.1004.535In this work, the influence of pre-deposition interfacial oxidation or post-deposition interface nitridation on the performance of 4H-SiC MOS capacitors was investigated. The gate oxide was deposited by LPCVD using TEOS as a precursor. Interface breakdown strength was derived from leakage current and Time-Zero Dielectric Breakdown characteristics whereas interface quality was assessed by the determination of interface state density from the comparison of quasi-static and high frequency capacitance-voltage characteristics using high-low method. In the experimental results, it is demonstrated that the gate oxide deposited by LPCVD using TEOS which is post-deposition annealed in nitric oxide ambient is advantageous for trench-gate MOSFET due to its effectiveness for improving the interface quality and oxide reliability, whereas pre-deposition interfacial oxidation is deleterious to interface state density and breakdown strength.enMOSgate oxidePost Oxidation Annealinginterface nitridationoxide reliabilityinterface state density670620530Pre-Deposition Interfacial Oxidation and Post-Deposition Interface Nitridation of LPCVD TEOS Used as Gate Dielectric on 4H-SiCconference paper