Ni, W.W.NiWang, X.X.WangXu, M.M.XuLi, M.M.LiFeng, C.C.FengXiao, H.H.XiaoLi, W.W.LiWang, Q.Q.WangSchlichting, H.H.SchlichtingErlbacher, T.T.Erlbacher2022-03-142022-03-142019https://publica.fraunhofer.de/handle/publica/40778010.1109/SSLChinaIFWS49075.2019.9019791In this paper, a 3300 V 100 mO 4H-SiC planar MOSFET with stepped p-body structure was designed and fabricated. 2D TCAD tool was used to design the MOSFET cell and field limiting ring junction termination structure. The junction field-effect transistor (JFET) region was optimized to get better trade-off between on-resistance and maximum gate oxide electric field in off-state. The stepped p-body was formed by two step ion implantations to transfer the avalanche point from the edge of the p-body to the deep p+ area. Finally, the threshold voltage of 1.7 V, subthreshold swing of 188 mV/decade and the average interface state density of 5.35E11 cm -2 eV -1 were obtained from the measured transfer curve.eneconomic and social effectselectric field effectsenergy gapfabricationinterface statesjunction gate field effect transistorslightingMOSFET devicessemiconductor junctionssilicon carbidesilicon compoundsthreshold voltage670620530conference paper