Lorenz, J.J.LorenzKampen, C.C.KampenBurenkov, A.A.BurenkovFühner, T.T.Fühner2022-03-112022-03-112009https://publica.fraunhofer.de/handle/publica/36436210.1109/VTSA.2009.5159272Source and relevance of process variations are briefly discussed. A combination of own lithography and commercial TCAD simulation software is applied to assess the impact of some of the most relevant variations occurring in lithography on the electrical properties of three kinds of CMOS devices with 32 nm physical gate length.enprocess variationlithography simulationprocess simulationCMOS devicesvariation-tolerant process flowdevice architecture670620530conference paper