Schmidt, G.G.SchmidtHahn, H.H.HahnHosticka, B.J.B.J.HostickaTimmermann, D.D.Timmermann2022-03-032022-03-031991https://publica.fraunhofer.de/handle/publica/180381A chip implementing the COordinate Rotation DIgital Computer (CORDIC) algorithm is described. It contains a 10-MHz 16-b fixed-point CORDIC arithmetic unit, 2-kb RAM, a controller, and I/O registers. A modified data-path architecture allows cross-wire free data flow. The chip design involved development of optimized carry-select adders and a modified PLA cell layout, which allows speed increase in single-layer metal technology.enAlgorithmenalgorithmsarchitectureArchitekturArithmetikCORDICSignalverarbeitung621journal article