Drechsler, R.Rogin, F.F.Rogin2022-03-072022-03-072010https://publica.fraunhofer.de/handle/publica/29517510.1007/978-90-481-9255-7Debugging is the bottleneck to chip design productivity. This state-of-the-art book reviews modeling and verification of ESL designs. It is believed to be the first book that considers debugging for ESL designs. There is particular focus on SystemC.en621004book