Blaho, M.M.BlahoPogany, D.D.PoganyGornik, E.E.GornikZullino, L.L.ZullinoMorena, E.E.MorenaStella, R.R.StellaAndreini, A.A.Andreini2022-03-092022-03-092003https://publica.fraunhofer.de/handle/publica/34216410.1109/RELPHY.2003.11977512-s2.0-0037634551BCD electrostatic discharge (ESD) protection npn devices with and without a sinker are analyzed experimentally and by device simulation. The device internal thermal and free carrier density distributions during vf-TLP and TLP stresses are studied by a backside transient interferometric mapping technique. Experimentally observed activity of lateral and vertical parts of the npn transistor are well reproduced by the simulation.en621conference paper