CC BY 4.0Trötschler, TheresaTheresaTrötschlerAl-Hajjawi, SaedSaedAl-HajjawiRaghavendran, SiddharthSiddharthRaghavendranHaunschild, JonasJonasHaunschildDemant, MatthiasMatthiasDemantHaunschild, JonasJonasHaunschildWörnhör, AlexandraAlexandraWörnhörRein, StefanStefanReinDemant, MatthiasMatthiasDemantRein, StefanStefanRein2025-02-142025-02-142024https://doi.org/10.24406/publica-4273https://publica.fraunhofer.de/handle/publica/48397310.52825/siliconpv.v2i.126510.24406/publica-4273Stacking faults in epitaxial Silicon wafers are structural defects that can reduce the recombination lifetime of the final solar cells significantly. They are known to originate mostly at the inter-face between substrate and deposited layer, at contamination particles and atomic steps. This work presents a non-destructive and automated characterization method on full-size wafers to locate stacking faults and determine their layer of origin in order to identify process-based root causes. A deep learning model and a quantification via geometric defect properties is realized on dark field microscope images, with the potential to be transferred to inline images meas-ured in dark field mode with high-resolution cameras. We achieve detection rates up to 92% for regular wafer surfaces. The depth analysis combines geometric properties of the stacking faults and measured wafer thickness and is applied on full-scale epitaxial wafers. Most stack-ing faults are confirmed to originate at the interface layer and their number is higher by 1-2 orders of magnitude when deposition occurs on a reorganized porous layer. However, our results also indicate that a non-negligible part of stacking faults has its origin within the epitaxial layer.encharacterizationdeep learningdefect locationepitaxial waferconference paper