Liu, S.S.LiuCheng, X.X.ChengZheng, L.L.ZhengSledziewski, T.T.SledziewskiErlbacher, T.T.ErlbacherSheng, L.L.ShengYu, Y.Y.Yu2022-03-062022-03-062020https://publica.fraunhofer.de/handle/publica/26380110.1016/j.sse.2020.107873The transition region between the active area and the edge termination of silicon carbide (SiC) MOSFET is either used to place a poly-silicon gate runner (G-MOS) or electrically contacted to the source potential (S-MOS), which is studied experimentally and by TCAD simulation in this work. The simulation results indicate that the transition region of G-MOS can effectively alleviate the propagation delay in the poly-silicon gate and allow all elementary cells to turn on quickly at the same gate voltage magnitude, which leads to a lower on-resistance (Ron), and small switching delay time. On the other hand, the transition region of G-MOS increases the Miller capacitance (Cgd), which can be reduced by shortening the length of the transition region. The simulation results are further validated by the experimental values, which show a reduction of Ron of G-MOS by 212% and an increase of Cgd of G-MOS by 72% compared to S-MOS. Moreover, the transition region barely influences the breakdown voltage of the devices, which are both higher than 1700 V.engate-drain capacitanceon-resistanceSiC MOSFETsswichting characteristicstransition region670537620530journal article