Burte, E.P.E.P.BurteMatthies, P.P.Matthies2022-03-022022-03-021988https://publica.fraunhofer.de/handle/publica/175313Anneal kinetics of interface traps in aluminium gate-silicon oxide-silicon structures has been studied using capacitance-voltage measurements. The capacitors were annealed in forming gas at temperatures ranging from 230 degrees C to 620 degrees C. An exponential decay of the trap density with annealing time has been observed. The curve of the equilibrium value of trap density obtained after long annealing times versus temperature shows an U-shaped form with a minimum located near 450 degrees C. A model based on the bimolecular reaction theory is proposed to explain the optained results. (AIS-B)enannealingCV-MessungGrenzflächenladungHalbleitertechnologieKapazitätsspannungsmessungMOS-Kondensatoroxidation670620530621journal article