Auersperg, J.J.AuerspergVogel, D.D.VogelSimon, J.J.SimonSchubert, A.A.SchubertMichel, B.B.Michel2022-03-092022-03-091997https://publica.fraunhofer.de/handle/publica/328984en621Reliability evaluation of chip scale packages by FEA and MicroDACconference paper