Analysis of wafer process duration for ab initio calculation of capacity, throughput and bottleneck equipments in a wafer fab

Etzel, H.H.EtzelOertel, H.H.OertelDudde, R.R.DuddeStaudt, P.P.Staudt2022-03-102022-03-102004https://publica.fraunhofer.de/handle/publica/34642110.1109/ASMC.2004.1309591en621Analysis of wafer process duration for ab initio calculation of capacity, throughput and bottleneck equipments in a wafer fabconference paper