Zakel, E.E.ZakelLin, D.D.LinGwiasda, J.J.GwiasdaOstmann, A.A.Ostmann2022-03-082022-03-081996https://publica.fraunhofer.de/handle/publica/303353Chip carrier arrangement (23) comprising a chip carrier (23) for the production of a chip housing, said chip carrier having conductors (21) on a film carrier (20), said conductors being connected to contact surface metallizations (40) of the chip on the carrier foil front side facing a chip (39), and the free ends of which form a two-dimensionally distributed terminal area arrangement (42) for connection to an electronic component or a substrate, whereby the conductors (21) are arranged on the rear of the carrier foil (20), openings (28) are provided in the carrier foil (20) in the area of the contact area metallizations (40), the conductors are covered by a shadow mask to form the terminal area arrangement (42), and the thickness (s) of the carrier foil is smaller than or mainly equal to the height (h) of the contact area metallizations (40) on the chip surface.de608621patent1995-19500655