Lang, M.M.LangNowotny, U.U.NowotnyBerroth, M.M.Berroth2022-03-032022-03-031991https://publica.fraunhofer.de/handle/publica/17959210.1049/el:19910289An ultrahigh speed 4 bit demultiplexer circuit has been developed and fabricated using a recessed gate process for enhancement and depletion transistors with 0:3mym gate length. First results show a data rate of 11-6 Gbit/s and a power consumption of 165 mW at 0-85 V supply voltage, including four 50Omega buffers.endemultiplexerhigh speedHochgeschwindigkeitlow power62166738411,6 Gbps 1 to 4 demultiplexer using double pulse doped Quantum Well GaAs/AlGaAs transistors.11,6 Gbps 1 zu 4 Demultiplexer unter Verwendung von Doppel Puls dotierten GaAs/AlGaAs Transistorenjournal article