Klinke, RolandRolandKlinkeHosticka, BedrichBedrichHostickaPfleiderer, Hans-JörgHans-JörgPfleiderer2022-03-082022-03-081988https://publica.fraunhofer.de/handle/publica/318203We present a dynamic CMOS operational amplifier with a special input circuit which injects an extra bias current to increase the slew-rate, depending on the input signal. The performance of this operational amplifier is compared to a conventional operational amplifier when used in a sample&hold circuit. The maximum operating clock frequency of the sample&hold circuit increases from 290 kHz up to 1 MHz with a hold-capacitor of 1 nF. The amplifier has been fabricated in a 5 µm CMOS process and dissipates a static power of 7.5 mW.enOperationsverstärkerA very high slew-rate dynamic CMOS operational amplifierconference paper