Bär, E.E.BärHenke, W.W.HenkeList, S.S.ListLorenz, J.J.Lorenz2022-03-092022-03-091998https://publica.fraunhofer.de/handle/publica/330635A completely three-dimensional (3D) simulation of the processes involved in the fabrication of a dual-damascene (DD) interconnect scheme has been carried out. For the simulations, an integrated 3D topography simulator has been used which comprises modules for the 3D simulation of optical lithography, etching, and layer deposition. The sputter deposition of TiN is investigated in more detail by means of simulation. As no re-emission of metal atoms from the surface is assumed, no simulation parameters are necessary and the only input required is the geometry of the feature and the sputter reactor. It is shown that for the DD structure considered here collimated sputtering does not result in sufficient step coverage and therefore chemical vapor deposition (CVD) is required for TiN barrier deposition.enDual-Damascene-ProzessierungHalbleitertechnologieprocess simulationProzeßsimulationsemiconductor technologyVerbindungsstruktur621670620530conference paper