Okuno, J.J.OkunoYonai, T.T.YonaiKunihiro, T.T.KunihiroKonishi, K.K.KonishiMaterano, M.M.MateranoAli, Tarek Nadi IsmailTarek Nadi IsmailAliLederer, MaximilianMaximilianLedererSeidel, KonradKonradSeidelMikolajick, T.T.MikolajickSchroeder, U.U.SchroederTsukamoto, M.M.TsukamotoUmebayashi, T.T.Umebayashi2022-10-042022-10-042022https://publica.fraunhofer.de/handle/publica/42720610.1109/EDTM53872.2022.97979432-s2.0-85133978221Recently, a novel, one-transistor one-capacitor (1T1C) type, ferroelectric random-access memory (FeRAM) array was developed, and its operation was experimentally demonstrated. This array was based on ferroelectric Hf0.5Zr0.5O2 (HZO), with a capacitor under bitline structure, and was compatible with system-on-chip. In this work, bitline voltage difference distributions were examined via cycling tests and observed to not deteriorate during fatigue and recovery stress, indicating uniform charge trapping and domain de-pinning within the ferroelectric domains in the test chip.enFatiguerecovery and FeRAM arrayconference paper