Bredendiek, C.C.BredendiekPohl, N.N.PohlJaeschke, T.T.JaeschkeAufinger, K.K.AufingerBilgic, A.A.Bilgic2022-03-122022-03-122013https://publica.fraunhofer.de/handle/publica/38091710.1109/RFIC.2013.6569590This paper presents an ultra-wideband single-chip radar transceiver MMIC around 240 GHz in a SiGe:C bipolar laboratory technology with an fT of 240 GHz and fmax of 380 GHz. The presented transceiver architecture consists of a fundamental 120 GHz VCO, two 240 GHz frequency doublers, a fundamental 240 GHz down-conversion mixer, a divide-by-four stage, a PLL-mixer and two on-chip patch antennas. The complete transceiver architecture is fully differential. The chip facilitates a -1 dBm peak output power (EIRP) at the transmit patch antenna and a tuning range of 61 GHz. The phase noise at 1 MHz offset is -84 dBc/Hz at 240 GHz (and better than -76 dBc/Hz over the full tuning range). The 240 GHz mixer offers a simulated noise figure below 17 dB, a simulated conversion gain of better than 5 dB, and an input refered compression point of -1.3 dBm. The results are achieved with a power consumption of 750 mW from a single 5 V supply.en621conference paper